1. Field of the Invention
The present invention relates to a high voltage generator circuit included in a semiconductor device such as a non-volatile semiconductor memory, and particularly, to an improvement in a limiter for stabilizing an output potential, provided in a high voltage generator circuit.
2. Description of the Related Art
In an EPROM (Electric Programmable Read Only Memory), that data is generally written by injecting electrons having a higher energy (called hot electrons) among those electrons which are flowing between a source and a drain, into a floating gate, with high voltages of approximately 12.5 V and 8 V being respectively applied to a control gate and a drain of a memory cell. Therefore, a high power supply for supplying a voltage of 12.5 V is required in addition to a power supply for 5 V. Meanwhile, in case of an EEPROM (Electrically Erasable Programmable Read Only Memory) called a flash EEPROM which is capable of flash-erasing (or blockerasing) data, a high voltage generator circuit is provided in a chip, so that this type of EEPROM operates with single power supply of 5 V. In a flash EEPROM, although a high voltage of approximately 20 V must be applied when data is erased or written, an F-N (Fowlor Nordheim) current which flows when data is erased or written is so small that an internal high voltage generator circuit which can be included in a chip and which has only a small current capacity is sufficient for erasing or writing data.
FIG. 1 schematically shows an example of an arrangement of a conventional high voltage generator circuit which is included in a semiconductor device operated with a single power supply as stated above. This high voltage generator circuit comprises a boosting circuit 1 and a limiter circuit 2. For example, a supply voltage Vcc of 5 V is inputted into the boosting circuit 1 from an external power supply, and is then boosted by the circuit to generate a high voltage Vpp. The high voltage Vpp thus generated is inputted into the limiter circuit 2 to stabilize the level of the voltage, and thereafter, a high voltage of 20 V is outputted from the limiter circuit 2, for example. The parasitic capacitance Cp of the load connected at node 9 and/or the parasitic capacitance of element 2 serves to stabilize the level of the output voltage.
FIG. 2 specifically shows an example of the arrangement of the high voltage generator circuit shown in FIG. 1. The boosting circuit 1 consists of a charge pump circuit 3 and a ring oscillator 4. The limiter circuit 2 consists of Zener diodes ZD1 and ZD2. The above charge pump circuit 3 consists of MOS transistors 5-1 to 5-n whose drains and gates are connected with each other and capacitors 6-1 to 6-(n-1). A current path of the MOS transistors 5-1 to 5-n is formed in series between a terminal 7 supplied with a supply voltage Vcc and another terminal 8 which outputs a boosted high voltage Vpp. The points connecting the MOS transistors 5-1 to 5-n with each other on the current path are respectively connected with electrodes of the capacitor 6-1 to 6-(n-1). The other electrodes of the capacitors 6-1, 6-3 . . . , are supplied with a clock pulse .phi.1 as shown in FIG. 3 outputted from a ring oscillator 4, while the other electrodes of the capacitors 6-2, 6-4, . . . , are supplied with a clock pulse .phi.2 as shown in FIG. 3 outputted from the ring oscillator 4.
The cathode and anode of the Zener diode ZD1 stated above are respectively connected to a terminal 8 and the cathode of the Zener diode ZD2. The anode of the Zener diode ZD2 is connected to a ground Vss. Each of the Zener diodes ZD1 and ZD2 is supplied with a voltage of 5 to 10 v. These Zener diodes ZD1 and ZD2 may be substituted with other kinds of diodes. The total number of Zener diodes or other diodes and the break-down voltages thereof are determined in accordance with an output voltage Vout to be outputted.
The above terminal 8 is connected to an output terminal 9. An output voltage Vout having a stabilized level is outputted from the output terminal 9.
In the arrangement as stated above, charges are sequentially transferred from a power supply Vcc through a current path connecting MOS transistors 5-1 to 5-n with each other, in synchronization with clock pulses .phi.1 and .phi.2 supplied from the ring oscillator 4, and a high voltage Vpp is outputted to the terminal 8 by a charge pump. When the high voltage Vpp thus outputted is higher than a sum of Zener voltages of Zener diodes ZD1 and ZD2, these Zener diodes ZD1 and ZD2 are broken down to lower the level of the voltage at the terminal 8. The output level of the voltage outputted from boosting circuit 1 is thus stabilized and outputted as an output voltage Vout from the terminal 9.
In case of a high voltage generator circuit shown in FIG. 2, the current (Ipp) supply ability is proportional to a product of a high level voltage V of clock pulses .phi.1 and .phi.2, a oscillation frequency f of the ring oscillator 4, and a capacity C of each capacitor 6-1 to 6-(n-1), i.e., "f.C.V". Consequently, in order to increase the current Ipp (charge pump current), it is sufficient to increase the oscillation frequency f of the ring oscillator 4, the electric potential of clock pulses .phi.1 and .phi.2, or the capacity C of each capacitor 6-1 to 6-(n-1). Assume that the above clock pulses .phi.1 and .phi.2 are generated by the ring oscillator 4 which is included in a semiconductor device and operated with a supply voltage vcc. Then, a relation of "Ipp=f.multidot.C.multidot.Vcc" is obtained since the electric potential V is equivalent to the supply voltage Vcc. Since the oscillation frequency f is proportional to the supply voltage vcc, the charge pump current Ipp is also proportional to a value of Vcc.sup.2. FIG. 4 shows a relationship between the supply voltage Vcc and the charge pump current Ipp.
The supply voltage Vcc, however, changes under influences of operations of various circuits, for example, by approximately .+-.0.5 V when the supply voltage Vcc is 5 V. Since the charge pump current Ipp is proportional to the value of Vcc.sup.2, as has been explained before, the charge pump current Ipp greatly changes when the supply voltage Vcc changes.
In general cases, a Zener diode has a characteristic as shown in FIG. 5. More specifically, a Zener diode has a characteristic that a voltage Vz applied to a cathode of the Zener diode is significantly dependent on a current Iz flowing between the cathode and anode thereof when the voltage Vz is higher than the break-down voltage of the Zener diode. It is also well-known that the value of the current Iz tends to be undesirably changed under influences of manufacturing process. In addition, since the uppermost value of the current Iz is limited, the Zener diode cannot regularly function when the voltage Vz is greatly changed. Therefore, a limiter circuit 2 having an arrangement of FIG. 2 where Zener diodes ZD1 and ZD2 are connected between an output terminal of a boosting circuit 1 and a ground Vss cannot attain a sufficient function when the high voltage Vpp is greatly changed.
A technique has been proposed to deal with such a large change in the supply voltage Vcc as stated above, and in accordance with this technique, zener diodes ZD1 and ZD2 are connected in parallel between a source and an emitter of a bipolar transistor, so that an excessive current is bypassed through a current path of the bipolar transistor. However, since a base current flows and makes it difficult to control currents when a bipolar transistor is used, it is difficult to sufficiently reduces changes in the output current Ipp. In case where a high voltage generator circuit which generates a negative voltage is used, changes in the output current Ipp cannot be controlled by use of a bipolar transistor. Further, in case of a semiconductor device using a MOS transistor as its main component, such as an EEPROM, incorporation of a bipolar transistor into the semiconductor device will complicate the manufacturing process, and therefore, application of a bipolar transistor into a MOS transistor is difficult.
As has been explained above, in a conventional high voltage generator circuit as shown in FIGS. 1 and 2, an output voltage of a boosting circuit depends on a supply voltage and is therefore easily changed in accordance with changes in the supply voltage. In addition, a limiter circuit of a conventional high voltage generator circuit cannot supply a stable output voltage or output current, since a zener voltage is easily changed due to variance of manufacturing process. These are factors which render erasing- or writing-characteristics of a memory unstable, in a non-volatile semiconductor memory using the high voltage generator circuit stated above,